/* $NetBSD: ixgbe_sriov.h,v 1.1.4.7 2023/10/13 18:32:38 martin Exp $ */
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******************************************************************************/
/*$FreeBSD: head/sys/dev/ixgbe/ixgbe_sriov.h 327031 2017-12-20 18:15:06Z erj $*/


#ifndef _IXGBE_SRIOV_H_
#define _IXGBE_SRIOV_H_

#ifdef PCI_IOV

#include <sys/nv.h>
#include <sys/iov_schema.h>
#include <dev/pci/pci_iov.h>
#include "ixgbe_mbx.h"

#define IXGBE_VF_CTS            (1 << 0) /* VF is clear to send. */
#define IXGBE_VF_CAP_MAC        (1 << 1) /* VF is permitted to change MAC. */
#define IXGBE_VF_CAP_VLAN       (1 << 2) /* VF is permitted to join vlans. */
#define IXGBE_VF_ACTIVE         (1 << 3) /* VF is active. */
#define IXGBE_VF_INDEX(vmdq)    ((vmdq) / 32)
#define IXGBE_VF_BIT(vmdq)      (1 << ((vmdq) % 32))

#define IXGBE_VT_MSG_MASK	0xFFFF

#define IXGBE_VT_MSGINFO(msg)	\
	(((msg) & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT)

#define IXGBE_VF_GET_QUEUES_RESP_LEN	5

#define IXGBE_API_VER_1_0	0
#define IXGBE_API_VER_2_0	1	/* Solaris API.  Not supported. */
#define IXGBE_API_VER_1_1	2
#define IXGBE_API_VER_UNKNOWN	UINT16_MAX

#define IXGBE_NO_VM             0
#define IXGBE_32_VM             32
#define IXGBE_64_VM             64

int  ixgbe_add_vf(device_t, u16, const nvlist_t *);
int  ixgbe_init_iov(device_t, u16, const nvlist_t *);
void ixgbe_uninit_iov(device_t);
void ixgbe_initialize_iov(struct ixgbe_softc *);
void ixgbe_recalculate_max_frame(struct ixgbe_softc *);
void ixgbe_ping_all_vfs(struct ixgbe_softc *);
int  ixgbe_pci_iov_detach(device_t);
void ixgbe_define_iov_schemas(device_t, int *);
void ixgbe_align_all_queue_indices(struct ixgbe_softc *);
int  ixgbe_vf_que_index(int, int, int);
u32  ixgbe_get_mtqc(int);
u32  ixgbe_get_mrqc(int);

/******************************************************************************/
#else  /* PCI_IOV */
/******************************************************************************/

#define ixgbe_add_vf(_a,_b,_c)		do { } while (/*CONSTCOND*/false)
#define ixgbe_init_iov(_a,_b,_c)	do { } while (/*CONSTCOND*/false)
#define ixgbe_uninit_iov(_a)		do { } while (/*CONSTCOND*/false)
#define ixgbe_initialize_iov(_a)	do { } while (/*CONSTCOND*/false)
#define ixgbe_recalculate_max_frame(_a)	do { } while (/*CONSTCOND*/false)
#define ixgbe_ping_all_vfs(_a)		do { } while (/*CONSTCOND*/false)
#define ixgbe_pci_iov_detach(_a) 0
#define ixgbe_define_iov_schemas(_a,_b)	do { } while (/*CONSTCOND*/false)
#define ixgbe_align_all_queue_indices(_a) do { } while (/*CONSTCOND*/false)
#define ixgbe_vf_que_index(_a, _b, _c) (_c)
#define ixgbe_get_mtqc(_a) IXGBE_MTQC_64Q_1PB
#define ixgbe_get_mrqc(_a) 0

#endif /* PCI_IOV */

void ixgbe_handle_mbx(void *);

#endif